AUTOMATIC VERIFICATION OF FINITE-STATE CONCURRENT SYSTEMS USING TEMPORAL LOGIC SPECIFICATIONS

被引：1663

作者：

CLARKE, EM

EMERSON, EA

SISTLA, AP

机构：

[1] UNIV TEXAS,DEPT COMP SCI,AUSTIN,TX 78712

[2] GTE LABS INC,RES LAB,WALTHAM,MA 02254

来源：

ACM TRANSACTIONS ON PROGRAMMING LANGUAGES AND SYSTEMS | 1986年 / 8卷 / 02期

关键词：

D O I：

10.1145/5397.5399

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

引用

页码：244 / 263

页数：20

共 19 条

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[4]

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[5]

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[6] USING BRANCHING TIME TEMPORAL LOGIC TO SYNTHESIZE SYNCHRONIZATION SKELETONS [J].

EMERSON, EA ;

CLARKE, EM .

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[7]

EMERSON EA, UNPUB J ACM

[8]

Gabbay D., 1980, POPL 80 PROC 7 ACM S, P163, DOI [10.1145/567446.567462, DOI 10.1145/567446.567462]

[9]

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HOARE, CAR .

COMMUNICATIONS OF THE ACM, 1978, 21 (08) :666-677

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