LSI YIELD MODELING AND PROCESS MONITORING

被引：63

作者：

STAPPER, CH ^{[1
]}

机构：

[1] IBM CORP,SYST PROD DIV LAB,BURLINGTON,VT 05452

来源：

关键词：

D O I：

10.1147/rd.203.0228

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：228 / 234

页数：7

共 12 条

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[5]

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[6]

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[7] COST-SIZE OPTIMA OF MONOLITHIC INTEGRATED CIRCUITS [J].

MURPHY, BT .

[8]

SEEDS RB, 1967, 1967 IEEE INT CONV 6, P60

[9] DEFECT DENSITY DISTRIBUTION FOR LSI YIELD CALCULATIONS [J].

STAPPER, CH .

[10]

THOMAS DR, 1974, GOV MICROCIRCUIT APP, P196