ANALYSIS OF FAULT TREES

被引：72

作者：

BENNETTS, RG ^{[1
]}

机构：

[1] UNIV SOUTHAMPTON,DEPT ELECTR,SOUTHAMPTON S09 5NH,ENGLAND

来源：

关键词：

D O I：

10.1109/TR.1975.5215143

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：175 / 185

页数：11

共 9 条

[1]

BENNETTS RG, 1972, BCS COMPUTER J, V15, P238

[2]

BENNETTS RG, 1972, THESIS U SOUTHHAMPTO

[3]

BREUER MA, 1968, 1968 P ACM NAT C, P241

FRATTA, L ;

MONTANARI, UG .

IEEE TRANSACTIONS ON CIRCUIT THEORY, 1973, CT20 (03) :203-211

[5]

FUSSELL JB, 1974, IEEE T RELIAB, VR 23, P51, DOI 10.1109/TR.1974.5215704

[6]

FUSSELL JB, 1973, JUL P NATO ADV STUD

[7]

HURLEY RB, 1963, IEEE T RELIAB, VR 12, P39

[8] EFFICIENT MAP METHOD FOR PROCESSING MULTISTATE LOGIC TREES [J].

PHIBBS, E ;

KUWAMOTO, SH .

[9]

PHIBBS E, 1974, IEEE T RELIABILITY, V23, P226