Profile-based dynamic voltage scheduling using program checkpoints

被引:55
作者
Azevedo, A [1 ]
Issenin, I [1 ]
Cornea, R [1 ]
Gupta, R [1 ]
Dutt, N [1 ]
Veidenbaum, A [1 ]
Nicolau, A [1 ]
机构
[1] Univ Calif Irvine, Ctr Embedded Comp Syst, Irvine, CA 92697 USA
来源
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, 2002 PROCEEDINGS | 2002年
关键词
D O I
10.1109/DATE.2002.998266
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Dynamic voltage scaling (DVS) is a known effective mechanism for reducing CPU energy consumption without significant performance degradation. While a lot of work has been done on inter-task scheduling algorithms to implement DVS under operating system control, new research challenges exist in intra-task DVS techniques under software and compiler control. In this paper we introduce a novel intra-task DVS technique under compiler control using program checkpoints. Checkpoints are generated at compile time and indicate places in the code where the processor speed and voltage should be re-calculated. Checkpoints also carry user-defined time constraints. Our technique handles multiple intra-task performance deadlines and modulates power consumption according to a run-time power budget. We experimented with two heuristics for adjusting the clock frequency and voltage. For the particular benchmark studied, one heuristic yielded 63% more energy savings than the other With the best of the heuristics we designed, our technique resulted in 82% energy savings over the execution of the program without employing DVS.
引用
收藏
页码:168 / 175
页数:8
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