Collaborative detection and filtering of shrew DDoS attacks using spectral analysis

被引:140
作者
Chen, Yu [1 ]
Hwang, Kai [1 ]
机构
[1] Univ So Calif, Internet & Grid Res Lab, Los Angeles, CA 90089 USA
基金
美国国家科学基金会;
关键词
network security; Internet infrastructure; packet filtering; DDoS attacks; reduction of quality; hypothesis test; digital signal processing (DSP); distributed computing; grid systems; statistical spectral analysis;
D O I
10.1016/j.jpdc.2006.04.007
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper presents a new spectral template-matching approach to countering shrew distributed denial-of-service (DDoS) attacks. These attacks are stealthy, periodic, pulsing, and low-rate in attack volume, very different from the flooding type of attacks. They are launched with high narrow spikes in very low frequency, periodically. Thus, shrew attacks may endanger the victim systems for a long time without being detected. In other words, such attacks may reduce the quality of services unnoticeably. Our defense method calls for collaborative detection and filtering (CDF) of shrew DDoS attacks. We detect shrew attack flows hidden in legitimate TCP/UDP streams by spectral analysis against pre-stored template of average attack spectral characteristics. This novel scheme is suitable for either software or hardware implementation. The CDF scheme is implemented with the NS-2 network simulator using real-life Internet background traffic mixed with attack datasets used by established research! groups. Our simulated results show high detection accuracy by merging alerts from cooperative routers. Both theoretical modeling and simulation experimental results are reported here. The experiments achieved up to 95% successful detection of network anomalies along with a low 10% false positive alarms. The scheme cuts off malicious flows containing shrew attacks using a newly developed packet-filtering scheme. Our filtering scheme retained 99% of legitimate TCP flows, compared with only 20% TCP flows retained by using the Drop Tail algorithm. The paper also considers DSP, FPGA, and network processor implementation issues and discusses limitations and further research challenges. (C) 2006 Elsevier Inc. All rights reserved.
引用
收藏
页码:1137 / 1151
页数:15
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