Scaling analysis of a neocortex inspired cognitive model on the Cray XD1

被引:8
作者
Rice, Kenneth L. [1 ]
Taha, Tarek M. [1 ]
Vutsinas, Christopher N. [1 ]
机构
[1] Clemson Univ, Dept Elect & Comp Engn, Clemson, SC 29634 USA
基金
美国国家科学基金会;
关键词
Reconfigurable computing; Cognitive algorithms; Performance scaling; Parallel computing; FPGA; ARCHITECTURES; NETWORKS; SYSTEMS; CORTEX;
D O I
10.1007/s11227-008-0195-z
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents the implementation and scaling of a neocortex inspired cognitive model on a Cray XD1. Both software and reconfigurable logic based FPGA implementations of the model are examined. This model belongs to a new class of biologically inspired cognitive models. Large scale versions of these models have the potential for significantly stronger inference capabilities than current conventional computing systems. These models have large amounts of parallelism and simple computations, thus allowing highly efficient hardware implementations. As a result, hardware-acceleration of these models can produce significant speedups over fully software implementations. Parallel software and hardware-accelerated implementations of such a model are investigated for networks of varying complexity. A scaling analysis of these networks is presented and utilized to estimate the throughput of both hardware-accelerated and software implementations of larger networks that utilize the full resources of the Cray XD1. Our results indicate that hardware-acceleration can provide average throughput gains of 75 times over software-only implementations of the networks we examined on this system.
引用
收藏
页码:21 / 43
页数:23
相关论文
共 30 条
[1]  
ANANTHANARAYANA.R, 2007, P ACM IEEE C SUP NOV
[2]  
Anderson J.A., 2003, BRAIN MIND, V4, P169
[3]  
Anderson J.A., 1993, ASSOCIATIVE NEURAL N, P77
[4]  
Anderson J.A., 2006, CHALLENGES COMPUTATI
[5]   If we compute faster, do we understand better? [J].
Anderson, JA ;
Sutton, JP .
BEHAVIOR RESEARCH METHODS INSTRUMENTS & COMPUTERS, 1997, 29 (01) :67-77
[6]  
[Anonymous], INT JOINT C NEUR NET
[7]   FPGA implementation of a systems identification module based upon Hopfield networks [J].
Atencia, Miguel ;
Boumeridja, Hafida ;
Joya, Gonzalo ;
Garcia-Lagos, Francisco ;
Sandoval, Francisco .
NEUROCOMPUTING, 2007, 70 (16-18) :2828-2835
[8]  
Boahen K., 2006, IEEE INT C ENG MED B
[9]  
BOUGANIS CS, 2006, INT C FIELD PROGR LO
[10]  
Dean T., 2005, P 20 NATL C ARTIFICI, P938